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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: RDM who wrote (40511)	10/31/1998 2:20:00 PM
From: Ali Chen	Respond to of 1573695

RDM <cache fill rate> You will be much more correct if you meant the "cache latency and throughput". By virtue of computing algorithms, the cache (on average) is filled once but gets executed many times, which is much more important for overall performance. Take care, - Ali

To: RDM who wrote (40511)	10/31/1998 2:53:00 PM
From: RDM	Respond to of 1573695

Upon reflection of your comments I would change my expression of "fill rate" for "L2 cache processor access time". Hence, the L2 cache processor access time is less for the K6-3 than for the K6-2 since the cache is on chip. While the benefit is to "cache throughput and latency" this description does not directly point to the architectural difference between the K6-2 and the K6-3.