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Technology Stocks : Dupont Photomasks (DPMI) -- Ignore unavailable to you. Want to Upgrade?

To: Carl R. who wrote (748)	11/23/1998 2:05:00 PM
From: Rob-Chemist	Read Replies (2) \| Respond to of 955

I think that the answer to your question depends upon the device. For many memory devices, sub-0.25 µm is clearly where the critical layers will be produced, with non-critical layers likely at 0.25-0.35 µm. Likewise, high-speed processors are also going to all be sub-0.25 µm for critical layers. ASICs, however, are probably not going to widths of less than 0.25 µm for at least another year. Presently, most ASIC producers are just transitioning to 0.25 µm (VLSI, ATML, LSI come to mind). While I am not an expert in this area, given the huge variety of different ASIC devices produced and the very large number of layers required for the most complex devices, I would guess that ASICs are the largest user of masks when compared with memory and processors. Your example of APM as a company that was caught on the trailing edge is extremely instructive, at least for industries where technology goes through distinct transitions (black and white changes)! I think that changes in chip manufacturing technology are more like fade to gray.