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Technology Stocks : Vitesse Semiconductor -- Ignore unavailable to you. Want to Upgrade?


To: P314159d who wrote (2060)12/1/1998 8:54:00 AM
From: w2j2  Read Replies (1) | Respond to of 4710
 
CAMARILLO, Calif.--(BUSINESS WIRE)--Dec. 1, 1998--

Scalable, Packet and Cell Switch IC Targets Gigabit Ethernet,
ATM, IP and Fibre Channel Applications

Vitesse Semiconductor Corp. (NASDAQ:VTSS) Tuesday announced the
introduction of the Cross-Stream chipset for high-bandwidth data
backplanes.
Cross-Stream enables synchronous serial backplanes that use fewer
chips, maintain faster switching and configuration speeds, and are
highly scalable, as compared to switch ICs that employ shared memory,
asynchronous or parallel switch fabrics. Each chipset includes the
VSC880, a 16x16, 2Gb/s serial switch fabric IC and the VSC870, the
associated 2Gb/s synchronous serial transceiver.
The minimum configuration provides 32Gb/s of data bandwidth
capable of up to 100 million connections per second (100M
CPS). Cross-Stream can operate in a fully synchronous configuration of
parallel chipsets, which makes multiple-hundred gigabit switches
cost-effective and easier to design. Cross-Stream can switch either
self-routing, variable length packets or fixed length cells, making it
ideal for most datacom switch equipment applications including Gigabit
Ethernet, ATM, IP and Fibre Channel.
Backplanes in data switches or routers must maintain aggregate
data rates greater than the total bandwidth of all incoming ports. As
data rates and port counts increase, the bottleneck at the switch
backplane also increases. For example, a 16 port OC-48 IP router
requires a minimum backplane bandwidth of 40Gb/s. Designers are
required to implement these and far larger switches while minimizing
cost and power. The answer lies in scalable architectures and minimal
chip counts.
SRAM bus width and access times limit today's shared memory
switches, making them unsuitable for capacities beyond about 20Gb/s.
Parallel crosspoint architectures offer higher capacity but require a
large number of high pin-count ASICs; a 20Gb/s design can use 20
250-pin ICs, plus transceivers and controllers. As the design
complexity spirals, routing becomes a difficult and expensive design
challenge while power and component costs escalate. By contrast,
Cross-Stream implements an aggregate 32Gb/s switch in a single IC with
associated port card transceivers and controllers. The required board
space is minimized, the IC count is constrained and routing is
simplified. These benefits, combined with Cross-Stream's inherent
scalability, offer switch designers a new architecture for
40Gb/s-and-up systems.
Cross-Stream is designed to operate in stand-alone self-routing
modes and controlled cell-base modes. The architecture provides for
simple, low-cost designs that appeal to manufacturers of
budget-sensitive products and also offers the level of control sought
by high-performance designs that put a premium on differentiation.
"Optimizing bandwidth in a switch depends on the nature of the
data traffic," stated Gary Lee, Vitesse's director of ATM and switch
IC design. "Variable length packets and fixed length cells place
different demands on control, buffering and queuing characteristics.
In Cross-Stream, our customers have a switch that can be used in
either types of operation. Its high speed, scalability and simplicity
offer significant advantages, such as faster design times and lower
design costs," continued Lee.
The key to Cross-Stream is its serial, synchronous operation. The
VSC870 port card transceivers are synchronized to a central clock
sourced by the VSC880 switch chip using in-band serial transmission.
Using this technique, all duty-cycle variations and data dependencies
seen in asynchronous switch designs are eliminated.
In packet-based switch applications, Cross-Stream operates in a
self-routing distributed control mode. The port transceivers send
connection requests to the switch IC and begin to transmit data when a
connection is acknowledged. Built-in arbitration is used to resolve
port conflicts. This is Cross-Stream's simplest mode of operation. All
switching decisions and controls are performed on-chip and no
additional controller is required. Variable packet sizes, multicast,
automatic recast, early arbitration, and virtual output queues are
supported.
By timing data transfers to a cell clock, the system can operate
in a cell-synchronous manner. This configuration is ideal for
fixed-cell length applications, such as ATM. Switch reconfiguration
can be performed on every cell cycle. In cell-based operation, a
parallel configuration interface allows the switch matrix to be
completely reconfigured in four clock cycles.
"Prior to Cross-Stream, Vitesse has delivered a series of
asynchronous crosspoint ICs at various serial data rates from 400Mb/s
to 2.5Gb/s," continued Lee. "We've also introduced a series of
gigabit-speed backplane interconnect ICs based on our long-established
Gigabit Ethernet and Fibre Channel transceiver technology.
Cross-Stream is a natural evolution for us, combining transceivers and
switch fabric on a single die, providing our customers with a new
approach to designing high-performance switches," concluded Lee.
The VSC880 16x16 serial crosspoint switch IC includes the switch
fabric and associated control logic. Each serial port features a Date
Recovery Unit (DRU) driven by a central, on-chip Clock Multiplier Unit
(CMU) to absorb variations in bit timing. An 8-bit CPU interface is
available for control and status monitoring. In addition, a 16 bit
parallel interface can be used to control the switch matrix in cell
mode. The high-speed serial I/O uses CML voltage levels and operates
at 2.125Gb/s to support a data rate of 2Gb/s and additional signaling.
Loop-back and BIST features are included for device and system test.
The device uses either a 3.3V or 2.0V supply and is delivered in a
304-pin BGA package.
The VSC870 serial transceiver performs duplex 32-bit
serialization and deserialization and adds signaling overhead. It
contains an on-chip clock recovery unit (CRU) and clock multiplication
unit (CMU). The transceiver is designed to work with the VSC880 switch
IC in packet or cell modes and can also communicate with another
VSC870 transceiver to implement a direct 32-bit, 2Gb/s serial link for
custom backplane or interconnect applications. The VSC870 performs bit
alignment, word alignment and cell alignment in conjunction with the
VSC880. Multiple transceivers can be ganged in parallel, with parallel
VSC880 switches, to implement arbitrarily large switch systems. The
high-speed serial I/O has primary and redundant inputs and output and
connects to the switch IC or other transceiver. Low-voltage TTL I/Os
are used on the low-speed parallel interface. Loop-back is included
for device and system test. The device uses a single 3.3V supply and
is delivered in a 192-pin BGA package.
The VSC870 transceiver will sample in Q1 1999 and is priced at
$69 in quantities of 1,000. The VSC880 switch IC will be available at
the same time and is priced at $250 in quantities of 1,000.
Vitesse Semiconductor Corp. is a world leader in the design,
development, manufacturing and marketing of high bandwidth
communications and Automatic Test Equipment (ATE) integrated circuits
(ICs). The company's products address the needs of telecommunications,
datacommunications and ATE equipment manufacturers who demand a
combination of high speed, high complexity and low power dissipation.
Vitesse corporate headquarters is in Camarillo, with its second
fabrication facility in Colorado Springs, Colo. producing volume ICs.
Company/product information can be found on the Web at
www.vitesse.com.