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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Cirruslvr who wrote (44682)	1/3/1999 9:39:00 PM
From: Elmer	Read Replies (2) \| Respond to of 1573433

Re: "Unless you are saying Intel "introduced" 4-way Xeons around the date this article came out (October 23, 1998), I think it is safe to say 4-way Xeon systems were delayed." I'm going from memory here but my recollection is the Xeon shipped in 4-way servers with 512 L2 at introduction in June. The 1 Meg shipped later. Re: "Earlier today you said that off chip L2 cache has 1/6 the bandwidth of on board L2 cache. Is that one of the reasons the Celeron A is that fast compared to the PII, or is it only because of its L2 cache speed?" What I said was that based on available information, the K7 L2 will run at 1/3 the core rate. I speculated that the bus width will also be 64 bit rather than 128 bit. 1/3 times 1/2 = 1/6. The Celeron with onboard L2 runs at the full core speed and I assume has a 128 bit data bus. Therefore if we set the Celeron L2 bandwidth to be 1, then at the same core speed the K7 L2 bandwidth will be 1/6 the Celeron. Ali has not challenged these numbers but the significance. He points out that latency is significant also. This is true however I believe the latency for onboard L2 will be less than for offboard L2. I'm sure I will hear if someone disagrees. EP