Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Jim McMannis who wrote (46051)	1/14/1999 6:16:00 PM
From: Scumbria	Read Replies (1) \| Respond to of 1571035

Jim, Depending on how many masks are being changed, they should be able to push product through a line in 1-3 weeks, if needed. Jerry said "It was a late mask change" (to fix the speedpath) indicating that not many layers were affected. Scumbria

To: Jim McMannis who wrote (46051)	1/14/1999 6:23:00 PM
From: Elmer	Respond to of 1571035

Re: "From what I gather, and I'm not a process person, is that a rocket lot is a small no. wafers that they rush through to finished chips. Instead of the normal 10 weeks it takes about 3 weeks. They do this to test yields etc. This is low volume, not mean't for normal production. I would assume AMD tested their mask problem fix in this manner. Elmer, Yousef, Paul are really the ones to ask." Rocket lot, hot lot etc, every company has their name for it. It's basically special handling to speed it through the FAB. First silicon and Qual lots usually get this treatment. Whenever time is of the essence. The FAB people hate them because they are extra work, so only special cases get this priority treatment and yes, I would think a speedpath fix would certainly qualify. EP

To: Jim McMannis who wrote (46051)	1/14/1999 7:47:00 PM
From: Yousef	Respond to of 1571035

Jim, Re: "From what I gather, and I'm not a process person, is that a rocket lot is a small no. wafers that they rush through to finished chips." Well first Jim, you are correct that a "rocket lot" has a much shorter Fab cycle time ... however ... I would think that there needs to be many lots to truly verify the margins. I know that AMD will run "skew" lots, but I would like to see a number of even these run. I'm still questioning if the silicon currently in AMD's Fab has been verified that it fixes the problem. Make It So, Yousef