To: Fabeyes who wrote (2980 ) 1/16/1999 4:07:00 PM From: Retiarius Read Replies (1) | Respond to of 8393
ORAM error-rate questions (do we have FLASH, DRAM, or something in-between?) first, it's great to have someone actually involved with memory manufacturing in this forum! i'm starting a study of the ecd/micron nonvolatile chalcogenide memory patents. already clear is that it's not solely lowrey's own technical contributions which could bring it all to fruition, but those of other micron contributors. for example, the reinberg/sandhu patents (#5,837,564 / 5,789,758) assigned to micron are very much "on point", citing of course the more senior work of ECD (5,335,219 and related). the latest USPTO issuances are very recent -- just within the last two months. the work of fernando gonzalez seems particularly germane. #5,753,947 (very high density DRAM cell structure and method for fabricating it) hints that broader-than-FLASH applications are contemplated. i was impressed that gonzalez/lowrey's work for micron [60+ patents for gonzalez himself as (co)inventor] started with a very nice hack even a nonspecialist such as my self has appreciated for some time -- a way of fabbing DRAM using stock photolithography with line widths nevertheless smaller than the wavelight of light (5,013,680), by turning much of the surface structure sideways to get chemical etching to the dirty work. i imagine that process technology such as this has been instrumental in delaying expensive use of E-beam or X-ray. a natural political question would be whether the non-lowrey micron patents would need to be cross-licensed, or are we dealing with a maverick fresh from a non-compete agreement who wants to spend time reverse engineering some of the work of a major assignee? a less natural but huge technical question is whether the lowrey group has gone beyond the 10**14 cycle limit of the earlier ECD solo work. at 100 nsec speeds, that is 10 million seconds which is less than 116 days. we wouldn't want our computer memories to rot away in that timeframe! if the joint venture is for flash apps only, that's a big market but must be won on cost because intel has multibit tricks with standard silicon tech as well, and where the flash density need not be bleeding-edge because it's mostly ROM-style software which isn't multimegabyte. now if the new tech is slated for DRAM replacement, we have a ginormous market, for which the characteristic of nonvolatility can substitute to some extent for cost. but the hard-error cyclability had better be solid -- much greater than the millions of erase cycles for optical disk active material, where failure modes range from pinpoint voids after time, to diffusion of dialectric, to oxygen and other impurities. do they have this nouveau DRAM all physically characterized? do they really have the gigabit density it'll take to enter the market a few years from now? and why wouldn't andy grove of intel have moved first, if it even had a hope of saving billions in costs down the line after taking a flyer on the hundreds of millions of startup capital it will surely require to dip a toe in the water for "ground-up" technology?