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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Cirruslvr who wrote (46439)	1/17/1999 11:54:00 PM
From: Paul Engel	Read Replies (2) \| Respond to of 1571924

Cringe - Re: "If it was a design problem, wouldn't it have hurt their ability to make ANY K6-2s?" So you believe that the MASK problem was INDEPENDENT of a DESIGN PROBLEM ??? !!!! No wonder you are CRINGEING ! You are way over your head Shawny ! DO you even KNOW what a MASK is? Paul

To: Cirruslvr who wrote (46439)	1/18/1999 12:11:00 AM
From: Elmer	Read Replies (3) \| Respond to of 1571924

Re: "If it was a design problem, wouldn't it have hurt their ability to make ANY K6-2s?" What is being debated here is, what kind of speed path "mask problem" could be fixed in just the top metal layers, when it clearly didn't affect their ability to produce slower product? No one has presented a reasonable case, imho. The only reasonable use of the term "late mask problem" would suggest a mask vendor related defect in one or more or the top metal layer mask plates. This doesn't seem likely in view of what you point out, it didn't prevent yield to slower speeds. It is more likely that it was a design or layout related problem that was fixed on one or more or the top metal layers. It's easy to blame the mask plates when you are talking to a roomful of financial analysts. This seems like a real kludge to me as a real fix probably have included lower level mask plates as well. EP

To: Cirruslvr who wrote (46439)	1/18/1999 12:12:00 AM
From: kash johal	Read Replies (1) \| Respond to of 1571924

Cirruslvr, >Re: Paul - RE: "It wasn't a MASK problem, per se - it was a DESIGN >PROBLEM." >If it was a design problem, wouldn't it have hurt their ability to >make ANY K6-2s? You are getting somewhat confused methinks. All processors have basic critical delay paths, some slower and faster than others. However as these chips operate at a clock frequency (or some multiple). So basically the chips are limited by the slowest paths and these become critical in limiting the chip speeds. Folks go out and incrementally improve speed paths over time and that is one way of improving the SPEED and binning yields. In AMD's case they had difficulty getting to 400Mhz speeds and had to fix it with a design/layout change. The design change results in new improved metal masks being manufactured. As far as Pauls 34% yield BS goes. AMD said they produced 40K wafers in Q4. Not all of which resulted in shippable product. If we use 35K wafers as what 5.5M shipped units resulted from we see that the yield is 157 good DPW. With around 300 Gross Die Per Wafer we can see that yields are in 50%-55% range. Not bad but not great. With 60K wafer/month capacity coming on stream that means that AMD can ship 7-9M K6-2 equivalent die. Although the k-3 is 50% bigger remember that at 0.18 micron the die will be similar to current k-6 size. I think the current decline is way overdone and represents a great buying opportunity. And I have bought some more. If it drops to $20 I will buy some more. I suspect that we will see the uptick in February when the k-3's are introduced. Regards, Kash