Future I/O Garners Support, Sets Timeline
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Future I/O Alliance Debuts With Broad Industry Support
Over 60 New Companies Join the Future I/O Alliance; Outlines Timeline Goals; Highlights Technical Underpinnings and Announces Governance and Intellectual Property Guidelines
SAN JOSE, Calif.--(BUSINESS WIRE)--Feb. 18, 1999-- The Future I/O Alliance, an open industry consortium dedicated to providing powerful I/O products for communication between servers, and their I/O devices in a robust and cost effective manner, today announced the success of the first Developer's Conference, which attracted hundreds of attendees from more than 90 companies. During the conference, held in Monterey, California on February 11-12, the Alliance outlined its specification goals and timeline, highlighted its technical tenets and established governance and intellectual property guidelines.
The Future I/O Alliance is championed by the current five promoter companies: Adaptec Inc., Compaq Computer Corporation, Hewlett-Packard, IBM, and its newest member 3Com Corporation. The Alliance is an open industry group dedicated to encouraging and rewarding participants for contributing their best enterprise technologies to solve real customer needs. It aims to leverage proven enterprise technologies to improve reliability, availability, and scalability over existing PCI technologies, and to map technology enhancements in anticipation of future computing application needs.
New Members
More than 60 new Participant companies including: AMD, Amdahl Associates, Digi International, Dolphin Interconnect, DPT, EMC, GigaNet, LSI Logic, Molex, Mylex, Novell, Poseidon, Q Logic, SCO, SGI, and SysKonnect among others have joined the effort to develop an open, Future I/O product solution. The Participant companies represent a best-of-breed cross-section of all the required disciplines from within the computer industry, including systems, networking, software, and hardware, and will work together to bring customers a clear path to the future by delivering standards based Future I/O products to the market.
Timeline
The Future I/O Alliance will continue to work over the remainder of 1999 to develop a technical specification that will be made available to all Alliance members by the end of the year. Ratification of the standard is expected early in 2000, with prototypes demonstrated shortly after. Products based on the standard are expected to ship in early 2001. This timeline highlights the cooperative nature of the Alliance, and meets market and customer demands for a stable Enterprise class solution developed within an environment that allows innovation within a standard.
Technical Highlights and The Evolution of Future I/O (FIO)
Compaq, HP, and IBM proposed the PCI-X bus protocol to PCI Special Interest Group (SIG) during the second half of 1998. The PCI-X bus protocol is an evolutionary design, based on, and remaining backward-compatible, with the prevalent PCI bus. PCI-X enables 64-bit, 133 MHz performance, for a total throughput of 1066 Megabyte/s. These evolutionary enhancements to PCI will meet the near-term (2 to 3 years) demands for I/O performance, allowing stable and customer need driven Future I/O solutions to be delivered to the industry in a timely fashion. The PCI SIG (Special Interest Group) formed a special workgroup to review the PCI-X proposal, and the workgroup intends to complete the specification during the first half of 1999. Many industry-leading companies have already committed to deliver products that incorporate the PCI-X technology by the end of 1999. PCI, and PCI-X will continue to be deployed in systems for many years, coexisting within the same systems as higher performance Future I/O solutions.
Building on the success of this initiative, Compaq, HP, and IBM have joined with Adaptec and 3Com to develop and promote the Future I/O specification. The specification is focused on providing a longer-term solution for I/O that will meet customer performance, flexibility and cost of ownership needs beyond the life and viability of PCI-X. The Future I/O interconnect will be based on a point-to-point, switched-fabric interconnect to provide high speed, low pin-count solutions.
The architecture has been in the specification stage for over 6 months, and is currently being refined with the input of Future I/O Participant companies. The overall goal, however, is to provide a single interconnect that can be used for both inter-processor communication in parallel application clusters as well as for high bandwidth technologies such as SCSI, Fibre Channel and Gigabit Ethernet in servers. This I/O interconnect will have performance that exceeds PCI-X at an implementation cost comparable to the existing, relatively inexpensive, PCI implementation cost.
At a component level, the anticipated Future I/O specification will use a simple switch to connect existing I/O protocols (such as SCSI) to the system area network interconnect. The initial Future I/O interconnect will be capable of one Gigabyte/s per link in either direction (1+1 GB/s link). The Future I/O protocol will be embedded in the peripheral device circuitry so that it can communicate with the switch effectively.
To support the ability of system area networks to connect modular building blocks (processor-to-processor, server-to-server; I/O device to I/O device, etc.), Future I/O designs are being established using three different distance models:
-- <10 Meters: ASIC-to-ASIC / Board-to-Board / Chassis to Chassis.
Uses parallel copper etch within boards and parallel cable
between Chassis.
-- 10 - 300 Meters: Datacenter Server-to-Server. Uses optical
fibre/serial copper cable with additional logic.
-- > 300 Meters: Will be possible with additional buffering and
logic.
Governance
The Future I/O Alliance announced plans to use a governance model similar to the existing PCI special interest group (PCI SIG) to develop the technical specification and to market and promote the technology. An independent governing body composed of industry leaders from many diverse segments will control the specification, and the Alliance is working to create a steering committee and management board shortly. As with the PCI SIG, special workgroups will be established as the need arises to evaluate specialized or complex issues. This governance model will ensure that industry and customer needs are
addressed in a mutually beneficial manner.
Intellectual Property
Future I/O promoters maintain significant intellectual property (IP) portfolios in the area of server I/O. Policies for IP exchange and protection have varied in scope and form among industry alliances and consortia, with dual goals promoting the adoption of an industry standard and of protecting contributors' IP investments. The Future I/O Alliance shares those goals and has agreed to a Future I/O licensing model that has a fixed annual fee with a commercially reasonable cap. The Future I/O promoters are working to set the annual fee at a level to encourage membership in the Alliance and productization around the
group's standard with the goal of encouraging the same broad market adoption that PCI enjoys today. The Alliance will announce more details soon.
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