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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Jim McMannis who wrote (50958)	2/25/1999 12:58:00 PM
From: Pravin Kamdar	Read Replies (2) \| Respond to of 1572102

Another K7 summary: ugeek.com Pravin.

To: Jim McMannis who wrote (50958)	2/25/1999 1:07:00 PM
From: Scumbria	Respond to of 1572102

Jim, Could AMD have to jack up the voltage because of a heat problem? No. Jacking up the voltage might contribute to a heat problem however. The only reasons to jack up the voltage would be: 1. Increase the clock speed. 2. Hide a vbox issue. (Hopefully this is not the case!) If the later, would there be a quick design fix? I can only speculate on the general nature of the problem. I can't predict the details of the fix, without knowing the details of the problem. Also, could getting the L3 to run right with the L2 cause any heat problem? Probably not. Hope this helps- Scumbria

To: Jim McMannis who wrote (50958)	2/25/1999 1:19:00 PM
From: RDM	Read Replies (2) \| Respond to of 1572102

The heat problems are from high voltage and large die and high MHz. Solutions for heat are die shrink. High voltage is used for speed, but results in more heat. High temperature cause slow speed. Thus if heat is not removed it will diminish the benefits of the high voltage. High voltage is only a problem if you use thin oxides. No one on this thread had mentioned the thin gate oxide thickness of Intels 2 volt process. It is in the range of 50-150 angstroms. AMD probably has a thicker thin gate oxide which would be able to handle higher "jacked-up" voltages. Process guys consider the oxide thickness a prized secret. It is really the ratio of voltage to thin oxide thickness, or electic field strength (volts/angstrom), that must not be exceeded. The maximum field strength that may be tolerated is reduced by cycling the electric field, thus the maximum field must be reduced at high Mhz. Without specific knowledge of the thin gate oxide thickness it is not possible to to know whether INTEL at 2 volts or AMD at 2.4 volts is stressing the oxide more. The introduction of large L2 cache may create yield problems due to large die size. The new K6-III feature of a larger and variable size L3 cache opens up possibilities of design/system/support chip problems. The chip heat problem is due to high voltage, high Mhz and large die size. Shrinking to .18 micron may fix by reducing die size.