SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Paul Engel who wrote (54191)4/5/1999 12:27:00 AM
From: Cirruslvr  Read Replies (2) | Respond to of 1580448
 
Paul - RE: "Do you think AMD will redesign it to stick L2 cache on the K7 ?"

Scumbria says there is a rule of thumb which states L2 cache should be at least 4X the L1 cache. Do you know if 512K on-chip cache would be big on the .18 process? (If anyone can calculate it, a size comparison of that to 128K and 256K on the .25 process would be helpful.)