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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Tenchusatsu who wrote (54361)4/5/1999 9:36:00 PM
From: Scumbria  Read Replies (1) | Respond to of 1583687
 
Ten,

Data hazards are a completely separate issue from cache latency. If a data hazard is detected, the results are forwarded directly from the completing execution unit to the stalled execution unit. The cache latency plays no role.

The only negative factor for a longer latency (pipelined) L1 cache is that there is one extra cycle of latency following a mispredicted change of instruction flow.

Scumbria



To: Tenchusatsu who wrote (54361)4/5/1999 9:42:00 PM
From: Scumbria  Read Replies (1) | Respond to of 1583687
 
Ten,

Digital estimates adding a cycle of data-cache latency costs about 4% in overall performance. Although this penalty sounds significant, the alternatives are a much lower hit rate on the primary caches or a decrease in clock speed, both of which would cause a greater performance loss.

homepages.strath.ac.uk

Scumbria


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