Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Paul Engel who wrote (56387)	4/26/1999 2:30:00 AM
From: Scumbria	Read Replies (1) \| Respond to of 1570482

Paul, Nope - but it will do them directly - and FASTER than any ALpha can do them! Not necessarily. FX!32 recompilation can do pretty good on a well written piece of code. Scumbria

To: Paul Engel who wrote (56387)	4/28/1999 2:23:00 AM
From: Rob Young	Read Replies (2) \| Respond to of 1570482

Re: "Merced won't do great on IA32 binaries, etc." Nope - but it will do them directly - and FASTER than any ALpha can do them! That is not a true statement because we don't know what Merced can do. But come along on this little exercise. Suppose EV68 at 1 GHz and compiler improvements gets to 50 SpecInt95 (well within reason) since FX!32 gets 70% native, that means an Intel binary on Alpha will run at 35 SpecInt95. What is Merced's shipping SpecInt level? I bet it will barely hit 40. Sure the foils say 50. I bet it won't get close at all. There are hints in a recent MPR newsletter where Linley focused exclusively on Merced fp performance. Intel fellas at the most recent IDF focused on Merced fp... almost as if integer doesn't exist. I'll bet Merced may get 30 SpecInt running native IA32. I'm not willing to bet on it though ;-)