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To: Tenchusatsu who wrote (19558)	5/1/1999 5:34:00 PM
From: Michael Gaudet	Read Replies (1) \| Respond to of 93625

Could you explain the rising and falling edges of the clock in non-technical terms?

To: Tenchusatsu who wrote (19558)	5/1/1999 10:28:00 PM
From: Alan Bell	Read Replies (1) \| Respond to of 93625

Tenchusatu, I agree that we are in a nit-picking semantic discussion. (But this is only fair after all the technical analysis on this thread <g>) While I agree that the transfer rate is 800 Mbits/sec for each data line, I claim the maximum needed frequency is 400 Mhz. If you have a data pattern of all ones, the frequency on the data line is 0Mhz. So the data pattern that exhibits the highest frequency is 10101010... As a signal line, this data pattern will look exactly like the clock signal except phase delayed by 90 degrees. It will have the same frequency as the clock which we established as 400Mhz. So the data signals will be at 400Mhz even though it is transferring 800Mbits/sec. The reason it is important to consider this as 400Mhz is for analysis of the board and stub lengths, etc. I agree its just word-play and it doesn't make sense to use it to describe data transfer rates. I am looking at it in terms of what a spectrum analyzer would see. -- Alan