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Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: unclewest who wrote (20338)	5/15/1999 5:52:00 AM
From: unclewest	Read Replies (1) \| Respond to of 93625

news... Date: 05/15 01:23 EST Die shrink expected to cut cost of Direct RDRAM -- Toshiba, NEC roll smaller dice for Rambus May. 14, 1999 (Electronic Engineering Times - CMP via COMTEX) -- Tokyo - In a move that is expected to help knock down the cost of Direct RDRAMs, two leading Japanese DRAM makers said they will soon use a 0.2-micron die shrink to produce 128- and 144-Mbit versions of the ultrafast DRAM devices. The chips are slated to move into volume production in time for Intel's scheduled release of its first Rambus-based chip set-the Camino-in September. Toshiba Corp. announced it is shipping samples of what it claims is the industry's smallest die-sized 128- and 144-Mbit ECC Direct Rambus parts. The company plans to start producing the chips in volume at its Yokkaichi fab in the third quarter. Toshiba said the die sizes for the new 128- and 144-Mbit Direct RDRAMs are 103 mm2 and 114 mm2, respectively. By comparison, Toshiba's latest 0.2-micron 128-Mbit SDRAMs (http://www.toshiba.com/taec/nonflash/indexproducts. html) have a die size of 91.7 mm2, making the Rambus part about 12 percent larger than the standard device. The typical die penalty for Direct Rambus has been 20 percent or more, according to analysts and industry observers. Along with higher test and packaging costs, the die penalty of Direct Rambus devices is considered to be one of the biggest contributors to the their high price. In addition, Toshiba has chosen a lower-cost 62-pin chip-scale packaging (CSP) technology. The technology uses standard wire bonding, which the company did not employ when it introduced samples of its earlier, 72-Mbit Direct Rambus device, a company spokesman said. Using that package, chips can be mounted on both sides of a RIMM module, enabling module capacities of 256 and 288 Mbytes. Device samples are approximately $83 and $99 for the 128- and 144-Mbit devices, respectively. Japanese companies' sample prices are typically about three to four times more than volume-production prices, the spokesman said. Even with the die shrinks, Direct Rambus won't likely be as cheap as SDRAM. Today, DRAM manufacturers sell 64-Mbit devices at prices ranging from $7 to $9. But OEMs have shown a willingness to pay extra for better DRAM performance, the Toshiba spokesman said. "If Toshiba can offer, say, $25 for the [128-Mbit] volume price, it's very competitive," he said. "Rambus is still much more costly than synchronous; however, the speed is better, and many PC vendors really want to have Rambus DRAM now." Similarly, NEC Corp., which started selling samples of its 0.22-micron-based 128-Mbit Direct RDRAM (http://www.ic.nec.co.jp/memory/english/products/dram/rmbs-144.html) last month, plans to shift to a 0.2-micron process technology before the company starts volume production of the parts in July, a company spokesman said. Currently, NEC's128-Mbit Direct RDRAMs have a die area of 132-mm2, and its 128-Mbit SDRAM die is 106 mm2. "When it goes to 0.2 micron, [the Direct RDRAM part] should be about the same size as the Toshiba chip," the NEC spokesman said. At about the same time, the spokesman said, NEC will likely introduce samples of 0.2-micron-based 144-Mbit devices, which will be used mainly in high-end systems with large banks of main memory. Both NEC's and Toshiba's 128-Mbit Direct RDRAMs employ a 256k-word x 16-bit x 32-bank memory structure and operate at a maximum frequency of 800 MHz to deliver 1.6-Gbyte/second performance. The supply voltage is 2.5 V. Toshiba, for its part, has a strong incentive to become a leading supplier of Direct RDRAMs. Aside from aiming to fulfill pent-up demand generated by PC OEMs, the company is involved in a joint design and manufacturing agreement for key processors that will be used in Sony Corp.'s next-generation Playstation, which will use Direct Rambus DRAMs. "Toshiba has already got a good user: Sony," the spokesman said. He said demand for Direct RDRAMs will be driven primarily by PCs and the next-generation Playstation, which is expected to hit store shelves in Japan by the end of the year. He noted, however, that new DRAM technology was hit with a setback earlier this year when Intel decided to delay the introduction of the Camino chip set. That has opened up opportunities for faster DRAMs based on SDRAM technology. "The Camino chip set was delayed only three months; however, the PC vendors' design time was delayed much longer-at least six months or so," he said. -0- By: Anthony Cataldo Copyright 1999 CMP Media Inc.

To: unclewest who wrote (20338)	5/15/1999 5:57:00 AM
From: unclewest	Respond to of 93625

news Date: 05/15 01:26 EST Denali Turbo-charges Rambus; Compaq's 'in' May. 14, 1999 (Electronic Engineering Times - CMP via COMTEX) -- Memory-modeling software provider Denali Software Inc. (Palo Alto, Calif.) has released its Turbo Channel simulation model for Rambus and announced that Compaq Computer Corp. is among the first systems houses to license the technology. Compaq will use the model in the development of next-generation Alpha processors. Denali sells Turbo Channel as an option to its RDRAM verification kit, which it announced in October. According to company president Sanjay Srivastava, the new technology, which will be sold as an option to the RDRAM verification kit, models the Rambus channel rather than an individual memory component and as such will speed systems simulation as much as 20 times. Rambus DRAM is a memory subsystem that promises to transfer up to 1.6 billion bytes per second. The subsystem consists of the RAM, the RAM controller, and the bus that connects the RAM to the microprocessor and other devices in the computer that use it. "RDRAM has a new packet-based protocol," said Srivastava. "We created the new technology so customers could take full advantage of Rambus' performance. Turbo Channel allows them to build Rambus applications that are faster, and it offers them better memory-system debugging capabilities." According to Srivastava, the Turbo Channel model, written in C, implements techniques for performance optimization when the Rambus Channel being modeled has many components connected to the channel. The Turbo Channel model costs $5,000. Denali's RDRAM Verification kit, with the Turbo Channel model and Denali's AutoTest automatic-test-vector generation program and debugging software, costs $80,00. Denali models and tools run on Windows and Unix platforms. See www.denalisoft.com.