Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Scumbria who wrote (59766)	5/27/1999 2:44:00 AM
From: Paul Engel	Respond to of 1572699

SCUMbria - Re: "Your K7 FUD time is diminishing rapidly, so I guess you better make the most of it." Hey DUUUUUUUUUUUUUUUUUUUUUUDE ! How much longer til JUNE gets here and those SupersoniK 7's start shipping and AMD preannounces a Q2 profit? Paul

To: Scumbria who wrote (59766)	5/27/1999 4:09:00 AM
From: Paul Engel	Read Replies (1) \| Respond to of 1572699

SCUMbria - You like a lot of registers don't you? How does 384 sound? 256 - General Purpose 128 - Floating Point. The processor will contain more than 256 internal general-purpose registers, 128 floating-point registers using 84-bit floating point numbers, parallel numeric processing, 64-bit memory addressing (over 1.84 thousand trillion addresses), MMX and SIMD extension support and symmetrical multiple processor abilities. The vendors say Merced also will maintain full compatibility with the 32-bit Pentium and HP's PA-RISC MAX2 instructions. Paul {===============================} zdnet.com Intel, HP Open Merced Details To Public? By Chris DeVoney Proclaiming the package to be the most significant change in architecture since the Intel 386, partners Intel and Hewlett-Packard early Tuesday morning took the wraps off their 64-bit Merced processor. Developers and the public alike can now surf the vendors' Web sites to review information about the next-generation processor, which is expected to reach preliminary silicon stages in the next 60 days and reach production workstations and servers during Q2, 2000. In press conference Monday, the companies revealed the general structure of the CPU. The processor will contain more than 256 internal general-purpose registers, 128 floating-point registers using 84-bit floating point numbers, parallel numeric processing, 64-bit memory addressing (over 1.84 thousand trillion addresses), MMX and SIMD extension support and symmetrical multiple processor abilities. The vendors say Merced also will maintain full compatibility with the 32-bit Pentium and HP's PA-RISC MAX2 instructions. Although not revealing the processor's core clock speed, company officials estimate that Merced should perform more than six gigaflops, six billion floating-point operations a second, where the current Pentium III does two gigaflops. Warren Wilson, an analyst for Summit Strategies, felt the announcement represented "another important milestone for the companies, but Merced has many more milestones to go before it hits the streets." Wilson also pointed out that when Intel deliveries silicon samples of Merced next quarter, "companies can move off of CPU simulators and start in earnest development of their systems and applications." Major details on Merced, including background material and the Application Architecture Guide (AIG) which examines the instructions used the by chip, can be found at both developer.intel.com or www.hp.com/go/ia64. Be aware that if the initial interest is strong, congestion at the sites may cause major delays for the first few days. Merced is just one of a series of IA-64 (Intel Architecture - 64 bit) processors. Later members of the groups are McKinney (estimated for 2001 delivery) and Madison (expected 2002), both positioned as server-oriented processors. Deerfield, with a possible 2002 debut, is aimed at workstations and servers. Although McKinley CPU's clock should hit 900MHz, Deerfield and Madison will break the gigahertz (billion cycles per second) system clock.