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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: grok who wrote (59918)5/28/1999 12:29:00 PM
From: Scumbria  Read Replies (1) | Respond to of 1573983
 
KZ,

I agree that it is easier to utilize wide IA-64 hardware than a wide x86 superscalar design, and that it is possible to hand craft code which demonstrates this. My question is whether it is theoretically or practically possible to write a compiler for a Von Neumann architecture which can usefully dispatch more than 2 instructions per cycle.

User source code inherently contains short loops, unpredictable branches, etc. As soon as you start bogging down the memory subsystem with speculative or look ahead load misses, you will see the performance degrade rapidly. The compiler people at IBM have been struggling with this problem for well over a decade.

Scumbria



To: grok who wrote (59918)5/28/1999 3:42:00 PM
From: Petz  Read Replies (2) | Respond to of 1573983
 
KZnerd, I agree with Scumbria that compilers for VLIW will never live up to their potential with the current programming paradigm. If programming was expressed using graphical flow diagrams it would be possible to make a good compiler. However, I think that multiple CPU's in a computer (multiprocessing) is ultimately more efficient than attempting to run multiple micro-threads in a single CPU. The graphical programming language is also the way to go for multiprocessing.

After reading many thoughtful posts on my question about the evolution of IA-32, IA-64, I mostly agree with kash that IA-64 and Alpha will start to overtake IA-32 eventually. I don't believe Intel will be the only company making IA-64 chips.

Petz