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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Cirruslvr who wrote (60911)	6/7/1999 10:58:00 PM
From: Cirruslvr	Read Replies (3) \| Respond to of 1574205

How good is this thing, and how much of a benefit will it provide??? ___________________________________________________________________ AMD AND MOSCAPE PARTNER TO BUILD A COHESIVE CIRCUIT DESIGN METHO dology for Microprocessor Design; Moscape to Provide Crucial Circuit Integrity Analysis Business Editors/Technology Writers SANTA CLARA, Calif.--(BUSINESS WIRE)--June 7, 1999--Moscape, Inc. announced a multi-year technology partnership with Advanced Micro Devices Inc. (AMD) to build a rule-based circuit analysis tool for AMD's next-generation microprocessor designs. Moscape's patented assertion-based technology enables designers to uncover several implementation issues to increase quality and performance of their design prior to tapeout. Moscape has delivered the basic customizable assertion-based engine that enables design methodology enforcement across the entire project. After a successful evaluation of the core engine, AMD engineers suggested several project-specific requirements. "Moscape certainly has the right idea about what the problem is," said Bruce Gieseke, K8 Circuit Design Manager and AMD Fellow. "A problem that we see in such complex S-O-C designs is the enforcement of a good methodology across such a large design team that ensures the quality, reliability and process scalability of the design. In a large and complex design task such as a high-end microprocessor, we cannot leave anything to chance. Besides needing the best static timing analysis, logic verification, and physical implementation tools, we need to verify the electrical integrity of the entire design." "With Moscape's technology we will be able to check many fundamental and AMD specific circuit integrity rules. CircuitScope has many rules built-in for immediate use. Its extendibility via the API, user-definable circuit classifications, and assertion language is a major benefit," continued Gieseke. "Another thing that we are thoroughly impressed with is the ability and willingness of Moscape to work with us on CircuitScope enhancements. Since they have designed a few chips themselves, they understand exactly where we are coming from." "Our intent is to integrate CircuitScope into our design methodology, and to continue to work with Moscape to fix bugs and continue to enhance its functionality," concluded Gieseke. "We are excited about the opportunity to work with a fine team of designers that shares our views about the significance of predictability and cohesive design methodology," said Dr. Rajit Chandra, vice president of technology at Moscape. "We are committed to this long term relationship and confident that it will provide unparalleled mutual benefits," Chandra added. quote.bloomberg.com __________________________________________________________________ All I get from reading this is that this thing may help find "errors" in a chip prior to tapeout that would have normally been found after tapeout.

To: Cirruslvr who wrote (60911)	6/7/1999 11:06:00 PM
From: kapkan4u	Read Replies (3) \| Respond to of 1574205

<Cirruslvr - re: A summary of practically everything you want to know about the K7. jc-news.com Thanks for writing all that JC! > JC on K7 and Dell: Nothing from them. If they haven't at least signed on for a look, then they're fools. It's okay for an outfit like Packard Bell or Hewlett Packard or any number of other Packards to ignore the K7, but Dell almost exclusively works in the consumer high end. By next month, the K7 will have redefined the consumer high end, and Dell may begin to have trouble competing with high priced low end parts like PIII or Coppermine Kap. PS. I wonder how much discount does Dell get on Pee-III for doing the "Intel inside" job.

To: Cirruslvr who wrote (60911)	6/7/1999 11:07:00 PM
From: kash johal	Read Replies (2) \| Respond to of 1574205

Cirruslvr, Re: Jc's link. Yeah its pretty good. I still think he's misinterpreted the whole PLL 2.5V/1.6V thing, but we'll know pretty soon. The only other major item that caught my eye was the Viper version is the L2 cache running at full speed. And apparently they are going to use DDR-SRAM- very intiguing if true!!! Regards, Kash