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To: Tony Viola who wrote (88901)	9/25/1999 5:52:00 AM
From: John Walliker	Read Replies (1) \| Respond to of 186894

Tony, The math: 2 slots X 16 chips/slot X 128 Megabits/chip divided by 8 bits per byte equals 512 Megabytes. ECC memory knocks that back a little. No, the ECC versions use 18-bit chips rather than 16-bit, so the memory available to the user is the same. John

To: Tony Viola who wrote (88901)	9/25/1999 11:32:00 AM
From: grok	Read Replies (2) \| Respond to of 186894

RE: <With this scheme, even though one RIMM slot out of three is unusable, you can still get 512 Megabytes in a system...not too shabby for a PC. That's the target for Rambus right now, PCs, not workstations or servers. I'll take 512 MB anyday (well, for the next year or so anyway).> Tony, with 128MBit Rdrams you can only put 512MByte on a Rambus channel due to the Rambus protocol which only allows 5 bits for device address. 128MBit x 32 = 512MByte. This has been true for at least two years but the press doesn't seem to realize it. I'm not sure all the OEMs realized it either. Not good but probably acceptable. If 256MBytes RIMMs are available and validiated then two of them can provide all the Rambus memory that you'll ever be able to put on Camino so the 3rd slot is not needed. But I don't know if these RIMMs are available or even if they work. These RIMMs need 8 Rdrams on each side of the module. In order to keep the traces clean and straight the Rdrams on one side of the module have "Mirrored packages" meaning that the pin location is different. I don't know if this is done by the package or different chips are required. But look here: usa.samsungsemi.com under comments and you'll see that Samsung's 128MByte module is "Validated by Intel" but the 256MByte module is not. I think that the actual situation is that there are no 256MByte RIMMs available at this time and only 128MBytes are. So the 3rd slot problem means that 256MByte is max memory for Vancouver boards. Also, it seems from the reports that just leaving the 3rd slot unused (even with a continuity module) is not enough because the trace lengths are messing up operation. So, at the least, the mobos have to been reworked to remove the unneeded trace length (if this is possible). I think that the actual situation is too complicated for the press to sniff out. Hopefully on Monday Intel and Rambus will explain the full story.