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To: kinkblot who wrote (941)	11/14/1999 10:41:00 AM
From: kinkblot	Read Replies (2) \| Respond to of 1820

LETI Microtechnologies: Material and Electronic Technology: wafer bonding www-dta.cea.fr Check out the photo and description of a transparent Si substrate, bonded to quartz after circuit fabrication: In this example, the CMOS circuits were produced on a standard SOI wafer. Once the process was complete the wafer was bonded to a quartz wafer by molecular adhesion. The silicon substrate was then removed by rectification and selective chemical attack. The transparent quality of the resulting substrate is clearly visible in the non-metallized areas. The circuits are fully operational after the transfer. Amongst other things, there are applications for this type of circuit transfer in hyperfrequency circuits and miniature flat screens. How 'bout that! Hmmm... "amongst other things" ? Maybe they're not tellin' about the really good stuff. <g> NOTE: LETI is part of the CEA (Commissariat À l'Énergie Atomique); that's why the patents are assigned to them. WT

To: kinkblot who wrote (941)	3/25/2000 12:01:00 PM
From: kinkblot	Read Replies (2) \| Respond to of 1820

Patent to LETI scientists for improved lift-off method. This method enables IC fabrication by standard thermal processing techniques before lift-off & transfer. In particular, a thin layer with electronic circuits and components can be produced from a monocrystalline silicon wafer (subclaims 2 and 9). U.S. #6,020,252 issued 02/01/00 to Aspar, et al., Method of producing a thin layer of semiconductor material patents.ibm.com Assignee: Commissariat a l'Energie Atomique (LETI) From the background/summary of the invention: This invention has been conceived in order to improve the method described in FR-A-2681472. After a step of ion implantation within a range of appropriate doses and before the separation step, it allows to carry out a thermal treatment of the part of the wafer corresponding to the future thin layer, in particular between 400° C. and 700° C. for silicon, without degrading the surface condition of the flat face of the wafer and without separation of the thin layer. This intermediate thermal treatment can form part of the operations for developing electronic components or can be applied for other reasons. {FR2681472 ---> US5374564} Intéressant, n'est-ce pas? WT