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To: Scumbria who wrote (72110)	5/6/2001 10:48:08 AM
From: Dave	Read Replies (1) \| Respond to of 93625

Scumbria, The only one I looked at real closely was the key "programmable latency register" patent. Fair enough. Another thing to consider is the filing date of the patent. While many things do not appear to be novel at this point in time, patents are granted based on the "date of conception". By the way, do you have that patent no. handy? Thanks in advance, dave

To: Scumbria who wrote (72110)	5/6/2001 1:12:32 PM
From: gnuman	Read Replies (1) \| Respond to of 93625

The only one I looked at real closely was the key "programmable latency register" patent. Latency compensation in RAM is almost as old as the industry. As I recall, there were some mainframe ferrite core memory systems that created data strobes which were core location dependent. (Basically a multi- tapped delay line with address selection of the taps). It's the implementation that is novel. So does the RDRAM implementation apply to SDRAM/DDR? Ahhh, that's the rub. <g> JMO's