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Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: Joe NYC who wrote (78619)	4/28/2002 12:23:11 AM
From: Ali Chen	Read Replies (2) \| Respond to of 275872

Roadmaps: I am curious. All AMD future products seem to rely on SOI technology. However, two years ago Intel has completed a SOI research and even published some results: intel.com "Scalability Revisited: 100 nm PD-SOI Transistors and Implications for 50 nm Devices" The article says: "SOI Ion-Ioff characteristics are significantly better (10-15% higher Ion) than previously reported for 0.18 mm technology generation transistors" However, this was for old 0.18 technology. Based on their data for smaller feature sizes of 0.13/100nm, their conclusion for future generations was not overly optimistic: "For 50 nm devices, the performance gain from SOI diminishes dramatically. Because product performance is increasingly affected by interconnect delays, the net benefit of SOI would be even smaller." So, the question: does AMD disagree with the results? Or the whole article a crafted misinformation? Or something goofy was overlooked in the article? - Ali

To: Joe NYC who wrote (78619)	4/28/2002 2:13:23 AM
From: burn2learn	Read Replies (4) \| Respond to of 275872

Hmm... I remember someone on this thread advocated these changes - killing Appaloosa, killing Clawhammer DP, putting 512K L2 on .13u K7 processor. Now, these changes have been put on the new, revised roadmap. It suspiciously coincides with the new CEO taking office... The 512k l2 interested me. To me this was a dent in AMD's armor in regards to die size. Following Intel to larger die sizes. I think Intel will go big on L2 and now it appears AMD will follow. It’s a pivotal piece in AMD’s ability to gain market share. I do think Intel’s die yields are better than AMD’s and forcing larger die size will flex this muscle. The question I want answered is why can’t AMD match Intel for die yields. What are the aspects to the differences in defect density and bin split performance that they can’t figure out? Maybe it’s as simple as they allow for significant litho related losses to maintain competitive on speed. Maybe with the design changes and constant process improvements to gain speed they don’t prioritize sustaining? You guys do assume it’s magical and just happens, speed comes from process improvements as well as design fixes. The process engineers must be experiencing shell shock, or just plain numb at this point. I think much could be gained in assuming ELMER’s numbers are right and trying to get the answers to why, or thought to prove / disprove. Forget what Intel does, question only AMD’s performance. I start with my take. A process no matter the maturity takes engineering resources to maintain there are always troubles to keep you busy 1. Tool performance – if not a dog tool for the factory, you always are looking at one of your tools compared to another and trying to figure out why they are statistically different. This is true for DD type issues and in some cases die performance. 2. Process transfers – First you have to ask what is the level of maturity of what you are about to get from your development site. In a competitive environment assume less mature. Guess what those defect density and performance issues you thought you had under control just went out the window because development did not have time to validate everything, or the problem simply was not detected in a low volume development Fab. Is the problem a simple transfer issue, did you not get that one tool parameter that makes a difference. Maybe it looked good on the reticle at the development site, but sucks on yours. 3. You need to fix the above issues and sustain and ramp volume. Guess what if you take a process tool down to troubleshoot a process issue it’s not making production. 4. You might have one or more fabs together on the same process. You need to have meetings to discuss the changes and fixes you are having at your fab. Convince others your fix is best. They think your fix sucks, but have done nothing to find an alternate fix. 5. Lets startup a foundry in Taiwan, now you get to transfer the developed process. Glad you have time right. When wafers don’t live up to performance expectations or you are needed to look at sustaining data for more tools….more time lost. 6. You have vacation, yeah!!!. Go ahead and leave everything will be OK! 7. Ohhh crap, an excursion occurred in your module somewhere. You are part of a problem that is killing 20 die per wafer. Gotto go to that meeting and support that effort. Your screwed if you’re tool is the problem. 8. Marketing just said we will have hammer by end of year….your schedule said you had till 2003 to develop you process….oh well no vacation. 9. You need to fly to Austin to find out what the hell happened to the process there and help fix. And yes while away from your Fab your tool goes to crap. 10. Work on cost cutting ideas, because you have nothing better to do. 11. Your wife and kids are ageing, sure would like to see them. My point is to show that AMD engineering are people too. There are only so many hours in the day and with a small company it’s expected that you get the answers to problems…..there is no redundancy. Process engineering is allot of work and is not to be taken for granted. I think AMD has resource issues. Great plans and continued push, but short on people to get the job done. One more thing, why is the above engineer working so hard? It’s because his AMD stock options kick ass right!