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To: Jim McMannis who wrote (168022)7/11/2002 11:07:35 PM
From: burn2learn  Read Replies (1) | Respond to of 186894
 
Designers create the design and make it possible but PE make it happen and are the source of execution you see in the scaleing. As a chip scales you need both design and process improvements, I'm biased on who contributes more...see you at 3 gig.

PE tweaks the process to optimize transistor performance. That is work!



To: Jim McMannis who wrote (168022)7/11/2002 11:12:58 PM
From: tcmay  Read Replies (2) | Respond to of 186894
 
Intel "Pipeline" vs. AMD "Wipeout!"--Let's go surfing now

"Let's give credit where credit is due. Who at Intel was responsible for designing the P4 to scale so well?
IMHO, that dude or dudette is one of the few that deserves a bonus. Very few get inducted into the Mhz sells (TM McM) hall of fame but whomever that was deserves it."

The speed scaling advantages of "long pipelines made up of simpler microinstructions" were discussed years ago.

The Droids said "Like, no way!"

Now we are seeing the outcome.

And the only long pipeline coming out of Sunnyvale is the sewer pipe.

--Tim May