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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Kevin K. Spurway who wrote (26253)11/29/1997 9:18:00 PM
From: StockMan  Respond to of 1572547
 
Kevin (aka brian),
Re -- that one reason Intel can clock its chips faster is that Slot 1 is a superior device for dissipating heat.

No. In simple terms, Intel can clock its chips faster because of its process technology, the design and layout.

Re -- If I'm convinced by people who know what they're talking about that it isn't, I'll happily change my opinion.

Kevin (aka Brian) who cares, if you change your opinion. You wont anyway. Its fun and you are funny.

Stockman



To: Kevin K. Spurway who wrote (26253)11/29/1997 10:13:00 PM
From: Yousef  Read Replies (2) | Respond to of 1572547
 
Kevin,

Re: " I'd actually like to hear from some of the more technically minded
people if my working theory is correct--specifically, that one reason Intel can clock its
chips faster is that Slot 1 is a superior device for dissipating heat ..."

Slot 1 has very little to do with the fact that Intel can achieve higher
clock speeds than AMD. Please re-read my previous post to you and focus
on the performance part of the post. In summary, the reason that Intel
achieves higher clock speeds is due to Intel's FET/device design that
optimizes/maximizes the device drive current (Idsat) at a lower operating
supply voltage (1.8V @ .25um). Please note that for the same Idsat drive
current, a lower supply voltage process will always clock at higher speeds.

exchange2000.com

Re: "Idsat will not remain the same, it will go up with voltage."

You have asked a very good question ... let me explain. A process
generation is typically defined by the printed poly gate length. For
a fixed gate length, your are correct ... Idsat does go up with voltage.
Idsat also goes up as gate length gets smaller. The other constraint
is that as gate length gets smaller, the voltage that can be applied
across the device (and gate) also has to go down. The two equations
that we are trying to optimize are:

Power ~ CV^2f , C = Capacitance, V = Operating Voltage, f = Frequency

Performance ~ I/(CV) , I = Idsat, C = Capacitance, V = Operating Voltage

It has been interesting that from process generation to generation,
Idsat and capacitance have stayed relatively constant ... for example

.35 generation - Idsat = ~625ua/um @ 2.5V, Lgate = .28um
.25 generation - Idsat = ~600ua/um @ 1.8V, Lgate = .22um

So in developing a process for optimum performance, one needs to optimize
the device drive current at low operating voltages. The processes
to optimize are gate thickness, Source/Drain implants, channel implants,
gate length ... The company that achieves the highest drive currents
at the lowest operating voltages win in both performance AND power.


I believe that AMD's process probably gives the following:

.25 - Idsat = ~600ua/um @ 2.1V, Lgate = .25um (my estimate of gate length)

Therefore, their devices (CPU's) will dissipate more power and will have
lower performance. I think the data on AMD's power/performance prove
my statements.


Hopefully this helps."


Kevin, please spend some time "digesting" this post as this answers many
of your questions.

Make It So,
Yousef



To: Kevin K. Spurway who wrote (26253)11/29/1997 10:59:00 PM
From: Elmer  Respond to of 1572547
 
Kevin,
You have taken a lot of flack today and it may be hard to believe but the real purpose is not to degrade or humiliate individuals, but rather to demonstrate that the real problem here is that poor management decisions are to blame for AMD's problems. The K6 has been from the start an attempt to compete head on with Intel. The definition of the K6 depended on too many high risk factors. Everything had to be perfect to be even close to competative. AMD simply doesn't have the money or process expertize to pull this off in the time available and under the market conditions that exist. The decision to "bet the farm" was a fools decision. It was fed by Jerry Sanders personal vendeta against Intel, and AMD shareholders have gone alone for the ride. They have financed Jerrys hate campaign with their futures. The personal wealth Jerry has amassed while squandering your's is a disgrace. He has cashed in FAR more money than Andy Grove has. Do you believe AMD shareholders have gotten their money's worth? Do you believe Jerry has operated with AMD shareholders interests in mind? I don't. That's the real issue here. AMD shareholders have a worse enemy in their CEO than they have in Intel. There is no great pleasure in pointing out the relative strengths of Intel and AMD's manufacturing capabilities. AMD shareholders need to hear who their real enemy is. He's sitting in the CEO's office and he's planning his next futile assult on Intel and he's blowing your money to do it.

EP



To: Kevin K. Spurway who wrote (26253)11/29/1997 11:19:00 PM
From: Ali Chen  Read Replies (2) | Respond to of 1572547
 
Kevin, <one reason Intel can clock its chips faster is that Slot 1 is a superior device for dissipating heat.> This is one of the reasons, and the weakest one. There is no problem to attach a similar big brick to a K6 and provide the same heat dissipation ability. (John Wang will probably disagree here and bring the bigger die size of P-II as a big advantage. May be true to some degree.)

In my opinion, the tiny differences in process implementation do not play significant role in the final speed grade of a CPU. The basics of the process was developed at Sematech and transferred equally to all members of the consortium.

The main reason why the Slot-1 CPU runs faster is the internal design methodoligy that Intel stole from DEC Alpha design - a RISK-like "short-tick" approach, when the complex logic is broken into longer processor pipelines. It takes more clocks to execute the same things, but the clock may be much shorter. However, the net output seems to be exactly the same.

If you would ask why the Slot-1 design shows slightly better performance, the answer is: due to additional "back-side" bus into L2 cache. AMD is going to fix this in K6+3D chip with on-chip L2 cache, as per my understanding.

Regards,

Ali