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To: robert scheb who wrote (23261)1/27/1998 4:00:00 PM
From: FJB  Read Replies (3) | Respond to of 33344
 
Yousef,

What does a cacheless 266MHz PII have to do with Intel's 0.25um process? I doubt they would be using limited 0.25um capacity for this product which simply requires not including an L2 cache with the 0.35 part.

Also, have you located any info concerning TSMC's 0.25um process? You were commenting quite a bit on it earlier. Were you commenting without knowing any details of the process?

Bob



To: robert scheb who wrote (23261)1/27/1998 4:40:00 PM
From: FJB  Read Replies (2) | Respond to of 33344
 
Scheb, OFF TOPIC

Did you see my post to you commenting on the National release? It disappeared. Now, a post I addressed to Yousef is addressed to you.
Very strange stuff.

Bob


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