To: Maxwell who wrote (4778 ) 3/6/1998 12:51:00 AM From: James Yu Respond to
Maxwell,CMOS 7S stacks six metal layers to pack between 150 million and 200 million transistors on a chip. In the ASIC world, that translates to as many as 12 million logic gates. "This is two to three years ahead of the competition," said Handel Jones, an analyst at International Business Strategies, Los Gatos, Calif. "From a system-IC point smaller and require little power to run. And it could go a long way toward solidifying IBM's position as a leader in the merchant chip market. Long recognized as a technology innovator, IBM in just the last few years has made its chips commercially available. "The big difference now is, IBM understands how to develop a technology advantage and then how to bring it to market," Jones said. "I think The process is in qualification at the company's Fishkill and Burlington, Vt., factories. Production is slated to begin by mid-1998, although IBM declined to discuss volumes. Using copper interconnects reduces the resistivity that aluminum introduces as signal speed increases. Industry sources "I think this is one of the key breakthroughs that will allow scaling to a much higher density," said Bijan Davari, IBM fellow and senior manager of logic technology development.Copper has a tendency to "poison" silicon, which makes a chip nonfunctional, Davari said. So instead of metal etching, the company used a dual damascene technique to insulate the copper from the silicon. Alternative approaches to copper are also in development, such as the use of dielectrics as insulation between metal lines. Chip makers have also been looking at fluorinated silicon oxide and other more exotic materials. "I think IBM claims chips produced with CMOS 7S can support up to 3,000 I/O connections on a single piece of silicon. Its recently introduced C4 package makes that level of I/O density possible, the company said.
